Fault tolerant techniques for asynchronous networks on chip

@inproceedings{Zhang2016FaultTT,
  title={Fault tolerant techniques for asynchronous networks on chip},
  author={Guangda Zhang},
  year={2016}
}
11 

Figures, Tables, and Topics from this paper.

Explore Further: Topics Discussed in This Paper

References

Publications referenced by this paper.
SHOWING 1-10 OF 202 REFERENCES

Coprocessor x100 Product Family: Specification Update

© Phi
  • http://www.intel.com/, May 2013. Online;
  • 2016

4.1 22nm Next-generation IBM System z microprocessor

  • 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers
  • 2015

A roadmap for heterogeneous integration in electronics

W. R. Bottoms
  • 2015

Electromigration-aware redundant via insertion

  • The 20th Asia and South Pacific Design Automation Conference
  • 2015

Fault tolerant mesh based Network-on-Chip architecture

  • 2015 IEEE International Symposium on Circuits and Systems (ISCAS)
  • 2015

How to Synchronize a Pausible Clock to a Reference

  • 2015 21st IEEE International Symposium on Asynchronous Circuits and Systems
  • 2015