Fault Tolerant Approaches to Nanoelectronic Programmable Logic Arrays

@article{Rao2007FaultTA,
  title={Fault Tolerant Approaches to Nanoelectronic Programmable Logic Arrays},
  author={Wenjing Rao and Alex Orailoglu and Ramesh Karri},
  journal={37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'07)},
  year={2007},
  pages={216-224}
}
Programmable logic arrays (PLA), which can implement arbitrary logic functions in a two-level logic form, are promising as platforms for nanoelectronic logic due to their highly regular structure compatible with the nano crossbar architectures. Reliability is an important challenge as far as nanoelectronic devices are concerned. Consequently, it is necessary to focus on the fault tolerance aspects of nanoelectronic PLAs to ensure their viability as a foundation for nanoelectronic systems. In… CONTINUE READING
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Design of Fault- Diagnosable and Repairable Folded PLA’s for Yield Enhancement

  • C-L. Wey, T-Y. Chang, J. Ding
  • IEEE Journal of Solid-State Circuits,
  • 1991
Highly Influential
14 Excerpts

Wey, “Design of Fault Diagnosable and Repairable PLA’s

  • T-Y. Chang, C-L
  • IEEE Journal of Solid-State Circuits,
  • 1989
Highly Influential
14 Excerpts

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