Fault Testing of CMOS Integrated Circuits Using Signature Analysis Method

  • Prof. R. H. Khade, Mr. Swapnil Gourkar
Moore's law states that the number of transistors in integrated circuits doubles every 18 months. Increasing complexity of digital system over the past decade has made it essential to increase the awareness of need of fault testing and diagnosis. With the increase in complexity of the digital system, a test simulation along with diagnosis has become an… CONTINUE READING