Fat-trees: Universal networks for hardware-efficient supercomputing

@article{Leiserson1985FattreesUN,
  title={Fat-trees: Universal networks for hardware-efficient supercomputing},
  author={Charles E. Leiserson},
  journal={IEEE Transactions on Computers},
  year={1985},
  volume={C-34},
  pages={892-901}
}
  • C. Leiserson
  • Published 1 October 1985
  • Computer Science
  • IEEE Transactions on Computers
The author presents a new class of universal routing networks, called fat-trees, which might be used to interconnect the processors of a general-purpose parallel supercomputer. A fat-tree routing network is parameterized not only in the number of processors, but also in the amount of simultaneous communication it can support. Since communication can be scaled independently from the number of processors, substantial hardware can be saved for such applications as finite-element analysis without… 
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In a VLSI-like model where hardware cost is equated with physical volume, the routing algorithm is used to demonstrate that fat-trees are universal routing networks in the sense that any routing network can be efficiently simulated by a fat-tree of comparable hardware cost.
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