Corpus ID: 17155763

Faster Modulo 2 n + 1 Multipliers without Booth Recoding

@inproceedings{Chaves2005FasterM2,
  title={Faster Modulo 2 n + 1 Multipliers without Booth Recoding},
  author={R. Chaves and L. Sousa},
  year={2005}
}
This paper proposes an improvement to the fastest modulo 2 + 1 multiplier already published, without Booth recoding. Results show that by manipulating the partial products and modulo reduction terms and by inserting them adequately in the multiplication matrix, the performance of multiplication units can be improved more than 20%. This improvement is obtained at the expense of some extra circuit area, which can be disregarded for operands with sufficient length. 
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