Fast software polar decoders

@article{Giard2013FastSP,
  title={Fast software polar decoders},
  author={Pascal Giard and Gabi Sarkis and Claude Thibeault and Warren J. Gross},
  journal={2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)},
  year={2013},
  pages={7555-7559}
}
  • P. GiardG. Sarkis W. Gross
  • Published 26 June 2013
  • Computer Science
  • 2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)
Among error-correcting codes, polar codes are the first to provably achieve channel capacity with an explicit construction. In this work, we present software implementations of a polar decoder that leverage the capabilities of modern general-purpose processors to achieve an information throughput in excess of 200 Mbps, a throughput well suited for software-defined-radio applications. We also show that, for a similar error-correction performance, the throughput of polar decoders both surpasses… 

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References

SHOWING 1-10 OF 18 REFERENCES

Fast Polar Decoders: Algorithm and Implementation

This work aims to increase the throughput of polar decoding hardware by an order of magnitude relative to successive-cancellation decoders and is more than 8 times faster than the current fastest polar decoder.

Scalable successive-cancellation hardware decoder for polar codes

  • A. J. RaymondW. Gross
  • Computer Science
    2013 IEEE Global Conference on Signal and Information Processing
  • 2013
This work presents an architecture and an implementation of a scalable hardware decoder based on the successive-cancellation algorithm, which can be designed for very long codes, with low hardware complexity, leveraging the regular structure of such codes.

A Semi-Parallel Successive-Cancellation Decoder for Polar Codes

The derived architecture has a very low processing complexity while the memory complexity remains similar to that of previous architectures, which allows very large polar code decoders to be implemented in hardware.

A Scalable Successive-Cancellation Decoder for Polar Codes

This paper presents an improved architecture for successive-cancellation decoding of polar codes, making use of a novel semi-parallel, encoder-based partial-sum computation module, and explores various optimization techniques such as a chained processing element and a variable quantization scheme.

Increasing the Throughput of Polar Decoders

An improved version of the simplified successive-cancellation decoding algorithm that increases decoding throughput without degrading the error-correction performance is presented.

A two phase successive cancellation decoder architecture for polar codes

The results show that the proposed two-phase successive cancellation decoder architecture for polar codes has lower complexity, lower memory utilization with higher throughput, and a clock frequency that is less sensitive to code length.

How to Construct Polar Codes

  • I. TalA. Vardy
  • Computer Science
    IEEE Transactions on Information Theory
  • 2013
A method for efficiently constructing polar codes is presented and analyzed, proving that for any fixed ε > 0 and all sufficiently large code lengths n, polar codes whose rate is within ε of channel capacity can be constructed in time and space that are both linear in n.

A Simplified Successive-Cancellation Decoder for Polar Codes

A modification is introduced of the successive-cancellation decoder for polar codes, in which local decoders for rate-one constituent codes are simplified. This modification reduces the decoding

A successive cancellation decoder ASIC for a 1024-bit polar code in 180nm CMOS

The implemented ASIC relies on a semi-parallel architecture where processing resources are reused to achieve good hardware efficiency and a speculative decoding technique is employed to increase the throughput by 25% at the cost of very limited added complexity.

Channel polarization: A method for constructing capacity-achieving codes

  • E. Arıkan
  • Computer Science
    2008 IEEE International Symposium on Information Theory
  • 2008
A method is proposed to construct code sequences that achieve the symmetric capacity I(W) of any given binary-input discrete memoryless channel (B-DMC) W, which is the highest rate achievable subject to using the input letters of the channel equiprobably.