Fast extraction of extrinsic cells in a NVM array after retention under gate stress

Abstract

As NVM technology gains maturity, new application fields emerge, often implying new product requirements, especially at high temperature. The data retention is a key criterion for good reliability cells. Many previous studies have already dealt with the charge leakage but some of them seem to show a leakage through SiO<inf>2</inf> tunnel oxide [1] while… (More)

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Cite this paper

@article{Djenadi2011FastEO, title={Fast extraction of extrinsic cells in a NVM array after retention under gate stress}, author={R. R. Djenadi and Gilles Micolau and J{\'e}r{\'e}my Postel-Pellerin and Romain Laffont and J. L. Ogier and Françoise Lalande and J. M. Melkonian}, journal={2011 International Semiconductor Device Research Symposium (ISDRS)}, year={2011}, pages={1-2} }