Fast PLL simulation using nonlinear VCO macromodels for accurate prediction of jitter and cycle-slipping due to loop nonidealities and supply noise

@article{Lai2005FastPS,
  title={Fast PLL simulation using nonlinear VCO macromodels for accurate prediction of jitter and cycle-slipping due to loop nonidealities and supply noise},
  author={Xiaolue Lai and Yayun Wan and Jaijeet S. Roychowdhury},
  journal={Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005.},
  year={2005},
  volume={1},
  pages={459-464 Vol. 1}
}
Phase-locked loops (PLLs) are widely used in electronic systems. As PLL malfunction is one of the most important factors in re-fabs of SoCs, fast simulation of PLLs to capture non-ideal behavior accurately is an immediate, pressing need in the semiconductor design industry. In this paper, we present a nonlinear macromodel based PLL simulation technique that is considerably more accurate than prior linear PLL simulation techniques. Our method is able to accurately capture transient behavior and… CONTINUE READING
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