# Fast Montgomery modular multiplication and RSA cryptographic processor architectures

@article{Mclvor2003FastMM, title={Fast Montgomery modular multiplication and RSA cryptographic processor architectures}, author={C. Mclvor and M{\'a}ire McLoone and John V. McCanny}, journal={The Thrity-Seventh Asilomar Conference on Signals, Systems \& Computers, 2003}, year={2003}, volume={1}, pages={379-384 Vol.1} }

New, generic silicon architectures for implementing Montgomery's multiplication algorithm are presented. [... ] Key Result The resulting Montgomery multiplier and RSA processor performance results presented are the fastest reported to date in the literature. Expand

## 133 Citations

Power Analysis of a Montgomery Modular Multiplier for Cryptosystems

- Computer Science2013 International Conference on Machine Intelligence and Research Advancement
- 2013

The main contribution of this paper is to implement modular multiplier using Montgomery algorithm for RSA encryption and decryption using Ripple Carry Adders, Carry Look ahead Adder and Carry Save Adders to perform the large word length Addition's required by this algorithm.

Modular Multiplication and Exponentiation Architectures for Fast RSA Cryptosystem Based on Digit Serial Computation

- Computer ScienceIEEE Transactions on Industrial Electronics
- 2011

Experimental results show that the proposed modular exponentiation and modular-multiplication design obtain the best delay performance compared with the published works and outperform them in terms of area-time complexity as well.

An optimised architecture for radix-2 Montgomery modular multiplication on FPGA

- Computer ScienceInt. J. High Perform. Syst. Archit.
- 2011

The algorithm and the hardware implementation of radix-2 Montgomery modular multiplication (MMM) are presented and an optimised intellectual property is realised to perform this operation with a reduced area, independent of the modulus size, dedicated to low rate cryptographic applications.

Fast architectures for FPGA-based implementation of RSA encryption algorithm

- Computer ScienceProceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921)
- 2004

The results of implementation using FPGA have shown that the proposed RSA structures outperformed those structures built around the traditional Montgomery multiplier in terms of speed, thanks to avoiding global lines broadcast.

Radix â€“ 4 Implementation of a Montgomery Multiplier for a RSA Cryptosystem

- Computer Science, Mathematics
- 2006

This project is an extension of a thesis done by Allen Michalski and looks to include a radix-4 implementation of the multiplications done in the Montgomery domain using FPGAs, optimizing for speed and area.

PARAMETERIZED RSA ARCHITECTURES

- Computer Science
- 2013

RSA structures that use a single Montgomery multiplier, termed area-efficient architecture, and architectures that require two Montgomery multipliers, called speed-efficient architectures are presented, which are scalable and parameterized.

A regular parallel RSA processor

- Computer ScienceThe 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.
- 2004

Novel architectures are proposed to eliminate the fanout bottleneck, which reduce the achievable minimum clock period of long modular multipliers of high performance VLSI implementation of the RSA algorithm using the systolic array.

Fast and Area Efficient RSA Cryptosystem Design Using Modified Montgomery Multiplication for FPGA Applications

- Computer Science, Mathematics
- 2013

The design of an efficient RSA cryptosystem that uses a modified Montgomery algorithm to increase the speed of modular multiplication and a very fast parallel prefix adder is employed to reduce the critical path.

Systematic Design of RSA Processors Based on High-Radix Montgomery Multipliers

- Computer ScienceIEEE Transactions on Very Large Scale Integration (VLSI) Systems
- 2011

This paper presents a systematic design approach to provide the optimized Rivest-Shamir-Adleman (RSA) processors based on high-radix Montgomery multipliers satisfying various user requirements, suchâ€¦

A new RSA encryption architecture and hardware implementation based on optimized Montgomery multiplication

- Computer Science2005 IEEE International Symposium on Circuits and Systems
- 2005

A systolic, scalable, redundant carry-save modular multiplier and an RSA encryption architecture are proposed using the Montgomery modular multiplication algorithm, completely avoiding the transformations from redundant to non-redundant numbers at the intermediate stages of the architectures.

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