Fast Algorithm and Low-Cost Hardware-Sharing Design of Multiple Integer Transforms for VC-1

@article{Fan2009FastAA,
  title={Fast Algorithm and Low-Cost Hardware-Sharing Design of Multiple Integer Transforms for VC-1},
  author={Chih-Peng Fan and Guo-An Su},
  journal={IEEE Transactions on Circuits and Systems II: Express Briefs},
  year={2009},
  volume={56},
  pages={788-792}
}
In this brief, the fast 1D multiple integer transforms of Windows Media Video 9 (WMV-9/VC-1) are proposed by matrix decompositions, additions, and row/column permutations. Then, the proposed fast 1D integer transforms are hardware shared, and they can be applied to the 2D transform scheme. The hardware costs of the proposed fast 1D and 2D integer transform designs are smaller than those of the previous individual designs without shares. With the hardware share, the proposed architecture is… CONTINUE READING
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Fast video codec transform implementations

  • S. Srinivasan, J. Liang
  • U.S. Patent 20 050 256 916, Nov. 17, 2005.
  • 2005
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An overview of VC-1

  • S. Srinivasan, S. L. Regunathan
  • Proc. SPIE, VCIP, Beijing, China, Jul. 2005, vol…
  • 2005

Fast video codec transform implementations Efficient fast 1 - D 8 × 8 inverse integer transform for VC - 1 application

  • S. Srinivasan, S. L. Regunathan
  • IEEE Trans . Circuits Syst . Video Technol .

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