Fair cache sharing and partitioning in a chip multiprocessor architecture


This paper presents a detailed study of fairness in cache sharing between threads in a chip multiprocessor (CMP) architecture. Prior work in CMP architectures has only studied throughput optimization techniques for a shared cache. The issue of fairness in cache sharing, and its relation to throughput, has not been studied. Fairness is a critical issue… (More)
DOI: 10.1109/PACT.2004.15


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