Fabrication of CMOS on ultrathin SOI obtained by epitaxial lateral overgrowth and chemical-mechanical polishing

@article{Shahidi1990FabricationOC,
  title={Fabrication of CMOS on ultrathin SOI obtained by epitaxial lateral overgrowth and chemical-mechanical polishing},
  author={G. Shahidi and B. Davari and Y. Taur and J. Warnock and M. Wordeman and P. McFarland and S. Mader and M. Rodriguez and R. Assenza and G. Bronner and B. Ginsberg and T. Lii and M. Polcari and T. Ning},
  journal={International Technical Digest on Electron Devices},
  year={1990},
  pages={587-590}
}
A novel method for obtaining ultra-thin, defect-free silicon on insulator (SOI) film is introduced. This technique uses epitaxial lateral overgrowth of Si (ELO) and chemical-mechanical polishing (CMP). SOI films with thicknesses of 100 nm were obtained. These films were used in fabrication and dual poly CMOS devices. The quality of the SOI film obtained is the same as that of bulk silicon, and the device characteristics are comparable with those of devices fabricated on bulk. A minimum geometry… Expand
SOI processing by epitaxial lateral overgrowth
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References

SHOWING 1-7 OF 7 REFERENCES
SOI by CVD: Epitaxial Lateral Overgrowth (ELO) process—Review
Abstract The ELO process (Epitaxial Lateral Overgrowth), based on the growth of silicon film over an SiO2 mask by the CVD technique, has been reviewed. The silicon film is locally seeded in openingsExpand
Selective epitaxial growth of silicon in pancake reactors
Abstract Selective epitaxial growth (SEG) of silicon opens new avenues in electronic device design by allowing vertical (three dimensional) integrated circuits to be fabricated and isolation betweenExpand
Two-dimensional simulation and measurement of high-performance MOSFETs made on a very thin SOI film
Thinning effects on the device characteristics of silicon-on-insulator (SOI) MOSFETs are discussed. Two-dimensional/two-carrier device simulation revealed the following advantages. An n-channelExpand
A high performance 0.25 mu m CMOS technology
A high-performance 0.25- mu m CMOS (complementary metal oxide semiconductor) technology with a reduced operating voltage of 2.5 V is presented. A loaded ring oscillator (NAND FI=FO=3. C/sub w/=0.2Expand
Selective epitaxial growth of silicon
Epitaxy Over Trench Technology for ULSI DRAMS" Dig. of' Tcch
  • Priperr, .S.w?zp. on VLSI Tech.
  • 1988