FPGA implementation of a high-resolution time-to-digital converter

  title={FPGA implementation of a high-resolution time-to-digital converter},
  author={Alberto Aloisio and Paolo Branchini and R. Cicalese and Raffaele Giordano and Vincenzo Izzo and Simona Loffredo},
  journal={2007 IEEE Nuclear Science Symposium Conference Record},
In the past years, precise measurements of time intervals have been realized using methods such as time- stretching, Vernier and delay line. In this paper, we present two high-resolution time-interval measuring system implemented in a SRAM-based FPGA device. The two methods ought to be used for time interpolation within the system clock cycle. In the first method, dedicated carry lines are used to perform fine time measurement, while in the second one a differential tapped delay line is used… CONTINUE READING
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Publications referenced by this paper.
Showing 1-4 of 4 references

Field programmable gate array time counter with two-stage interpolation

R. Szymanowski, J. Kalisz
Rev. Sci. Instrum., vol. 76, 2005. 045 104. • 2005
View 3 Excerpts
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View 1 Excerpt

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