FPGA implementation of a Digital Front End block for a Multi-Carrier Multi-Antenna system

Abstract

This paper describes a Field Programmable Gate Array (FPGA) implementation of a Digital Front End (DFE) block for a Multi-Carrier Multi-Antenna (MCMA) system. The decimation/ interpolation filters used for obtaining the required channel bandwidth are split into several low order decimation/ interpolation stages, each of them being implemented as a polyphase… (More)

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Cite this paper

@article{Mocanu2009FPGAIO, title={FPGA implementation of a Digital Front End block for a Multi-Carrier Multi-Antenna system}, author={Vlad Mocanu and Cristian Anghel and A. A. Enescu}, journal={2009 International Semiconductor Conference}, year={2009}, volume={2}, pages={431-434} }