FPGA based hardware acceleration for elliptic curve public key cryptosystems

@article{Ernst2004FPGABH,
  title={FPGA based hardware acceleration for elliptic curve public key cryptosystems},
  author={M. Ernst and B. Henhapl and S. Klupsch and Sorin A. Huss},
  journal={Journal of Systems and Software},
  year={2004},
  volume={70},
  pages={299-313}
}
VHDL model descriptions can be processed by synthesis tools in order to derive a netlist of basic logic elements, which can then be fed into place and route tools. Based on this design flow Register Transfer Level (RTL) descriptions have proven to be well suited to efficiently design integrated circuits. In addition to using commercial synthesis tools, there is a lot of potential for application specific model generators, which produce an RTL description from a more abstract rule set. The RTL… CONTINUE READING