FPGA-based Key Generator for the Niederreiter Cryptosystem Using Binary Goppa Codes


This paper presents a post-quantum secure, efficient, and tunable FPGA implementation of the key-generation algorithm for the Niederreiter cryptosystem using binary Goppa codes. Our key-generator implementation requires as few as 896,052 cycles to produce both public and private portions of a key, and can achieve an estimated frequency Fmax of over 240 MHz… (More)
DOI: 10.1007/978-3-319-66787-4_13

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