FPGA Montgomery modular multiplication architectures suitable for ECCs over GF(p)

  title={FPGA Montgomery modular multiplication architectures suitable for ECCs over GF(p)},
  author={Ciaran McIvor and M{\'a}ire O'Neill and John V. McCanny},
  journal={2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)},
  • C. McIvor, M. O'Neill, J. McCanny
  • Published 23 May 2004
  • Computer Science, Mathematics
  • 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)
New FPGA architectures for the ordinary Montgomery multiplication algorithm and the FIOS modular multiplication algorithm are presented. The embedded 18 /spl times/ 18-bit multipliers and fast carry look-ahead logic located on the Xilinx Virtex2 Pro family of FPGAs are used to perform the ordinary multiplications and additions/subtractions required by these two algorithms. The architectures are developed for use in elliptic curve cryptosystems over GF(p), which require modular field… 

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