FPGA-Based Scalable and Power-Efficient Fluid Simulation using Floating-Point DSP Blocks

@article{Sano2017FPGABasedSA,
  title={FPGA-Based Scalable and Power-Efficient Fluid Simulation using Floating-Point DSP Blocks},
  author={Kentaro Sano and Satoru Yamamoto},
  journal={IEEE Transactions on Parallel and Distributed Systems},
  year={2017},
  volume={28},
  pages={2823-2837}
}
High-performance and low-power computation is required for large-scale fluid dynamics simulation. Due to the inefficient architecture and structure of CPUs and GPUs, they now have a difficulty in improving power efficiency for the target application. Although FPGAs become promising alternatives for power-efficient and high-performance computation due to their new architecture having floating-point (FP) DSP blocks, their relatively narrow memory bandwidth requires an appropriate way to fully… CONTINUE READING

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