FPGA-Based Reduction Techniques for Efficient Deep Neural Network Deployment

@article{Page2016FPGABasedRT,
  title={FPGA-Based Reduction Techniques for Efficient Deep Neural Network Deployment},
  author={Adam Page and Tinoosh Mohsenin},
  journal={2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)},
  year={2016},
  pages={200-200}
}
Deep neural networks have been shown to outperform prior state-of-the-art solutions that often relied heavily on hand-engineered feature extraction techniques coupled with simple classification algorithms. In particular, deep max-pooling convolutional neural networks (MPCNN) have been shown to dominate on several popular public benchmarks. Unfortunately… CONTINUE READING