Extreme scaling with ultra-thin Si channel MOSFETs

@article{Doris2002ExtremeSW,
  title={Extreme scaling with ultra-thin Si channel MOSFETs},
  author={Bruce B. Doris and Meikei Ieong and Thomas S. Kanarsky and Ying Zhang and Ronnen Andrew Roy and Omer H. Dokumaci and Zhibin Ren and F. Jamin and Leathen Shi and Wesley C. Natzle and Hsiang-Jen Huang and J. Mezzapelle and Anda Mocuta and S. Womack and Michael A. Gribelyuk and E.C. Jones and R.J. Miller and H.-S.P. Wong and Wilfried E. Haensch},
  journal={Digest. International Electron Devices Meeting,},
  year={2002},
  pages={267-270}
}
We examine the scaling limits for planar single gate technology using the ultra-thin Si channel MOSFET. Characteristics for extreme scaled devices with physical gate lengths down to 6 nm and SOI channels as thin as 4 nm are presented. For the first time, we report ring oscillators with 26 nm gate lengths and ultra-thin Si channels. 

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References

Nanoscale ultrathin body PMOSFETs with raised selective germanium source/drain
Nanoscale ultrathin body (UTB) p-channel MOSFETs with body thickness down to 4 nm and raised source and drain (S/D) using selectively deposited Ge are demonstrated for the first time. Devices with