Extreme scaling with ultra-thin Si channel MOSFETs

@article{Doris2002ExtremeSW,
  title={Extreme scaling with ultra-thin Si channel MOSFETs},
  author={B. Doris and M. Ieong and T. Kanarsky and Y. Zhang and R. Roy and O. Dokumaci and Z. Ren and F. Jamin and L. Shi and W. Natzle and Hsiang-Jen Huang and J. Mezzapelle and A. Mocuta and S. Womack and M. Gribelyuk and E. Jones and R. J. Miller and H.-S.P. Wong and W. Haensch},
  journal={Digest. International Electron Devices Meeting,},
  year={2002},
  pages={267-270}
}
We examine the scaling limits for planar single gate technology using the ultra-thin Si channel MOSFET. Characteristics for extreme scaled devices with physical gate lengths down to 6 nm and SOI channels as thin as 4 nm are presented. For the first time, we report ring oscillators with 26 nm gate lengths and ultra-thin Si channels. 

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References

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Nanoscale ultrathin body (UTB) p-channel MOSFETs with body thickness down to 4 nm and raised source and drain (S/D) using selectively deposited Ge are demonstrated for the first time. Devices withExpand