Exploring Energy Reduction in Future Technology Nodes via Voltage Scaling with Application to 10nm

@article{Yalcin2016ExploringER,
  title={Exploring Energy Reduction in Future Technology Nodes via Voltage Scaling with Application to 10nm},
  author={Gulay Yalcin and Santhosh Kumar Rethinagiri and Oscar Palomar and Osman S. Unsal and Adri{\'a}n Cristal and Dragomir Milojevic},
  journal={2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP)},
  year={2016},
  pages={184-191}
}
Voltage and frequency downscaling is a well-known scheme in order to reduce the energy consumption of a computer system. However, the quantity of the saved energy first depends on the utilized technology node. Also, when the voltage level is below the safe margin, instructions need to be re-executed due to voltage related faults which can present additional… CONTINUE READING