Exploiting Locality for Low-Power Design

Abstract

We propose a new high-level synthesis technique for the low-power implementation of real-time applications. The technique uses algorithm partitioning to preserve locality in the assignment of operations to hardware units. This results in reduced usage of long high-capacitance buses, fewer accesses to multiplexors and buffers, and more compact layouts… (More)

Topics

7 Figures and Tables

Cite this paper

@inproceedings{Mehra1996ExploitingLF, title={Exploiting Locality for Low-Power Design}, author={Renu Mehra and Lisa Guerra and Jan Rabaey}, year={1996} }