Exploiting Emergence in On-Chip Interconnects

@article{Hollis2014ExploitingEI,
  title={Exploiting Emergence in On-Chip Interconnects},
  author={Simon J. Hollis and Chris Jackson and Paul Bogdan and Radu Marculescu},
  journal={IEEE Transactions on Computers},
  year={2014},
  volume={63},
  pages={570-582}
}
To solve the grand challenges in contemporary chip design, such as process-to-core mapping, energy reduction, and maintenance of programmer/hardware abstraction, we advocate for self-optimizing (emergent) networks-on-chip (NoC). In these networks, topology and information flow adapt dynamically to maximize the network throughput or minimize the network latency via distributed application of microrules. In this paper, we introduce the concept of emergent small-world NoCs and discuss novel design… CONTINUE READING

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