Explanation of the Rugged LDMOS Behavior by Means of Numerical Analysis

@article{Reggiani2009ExplanationOT,
  title={Explanation of the Rugged LDMOS Behavior by Means of Numerical Analysis},
  author={S.. Reggiani and G.. Baccarani and E.. Gnani and A. Gnudi and Marie Denison and Sameer Pendharkar and R. Wise and Sridhar Seetharaman},
  journal={IEEE Transactions on Electron Devices},
  year={2009},
  volume={56},
  pages={2811-2818}
}
In this paper, a numerical investigation on the behavior of a rugged LDMOS transistor operating in the high current-voltage pulsed regime is carried out with the aim of clarifying the physical origin of the current "enhancement" that is visible in the output characteristics at high drain and gate biases. The investigation shows that the output characteristics are significantly affected by the "quasi-saturation" effect at low drain voltages. The impact-ionization rate in the drain extension at… CONTINUE READING

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References

Publications referenced by this paper.
Showing 1-9 of 9 references

Two-Carrier Current Saturation in a Lateral Dmos

2006 IEEE International Symposium on Power Semiconductor Devices and IC's • 2006
View 1 Excerpt

A Rugged LDMOS for LBC5 Technology

Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005. • 2005
View 5 Excerpts

Electron and hole mobility in silicon at large operating temperatures—Part I: Bulk mobility

S. Reggiani, M. Valdinoci, +7 authors L. Zullino
IEEE Trans. Electron Devices, vol. 49, no. 3, pp. 490–499, Mar. 2002. • 2002
View 1 Excerpt

A review of RESURF technology

A. W. Ludikhize
Proc. ISPSD, Toulouse, France, May 22–25, 2000, pp. 11–18. • 2000
View 1 Excerpt

Advanced 2D/3D ESD device simulation-a powerful tool already used in a pre-Si phase

Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No.00TH8476) • 2000
View 1 Excerpt

A theory of transistor cutoff frequency (fT ) fall-off at high current density

C. T. Kirk
IEEE Trans. Electron Devices, vol. 9, no. 2, pp. 164–174, Mar. 1962. • 1962
View 1 Excerpt

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