Experimental Evaluation of On-Chip Microprocessor Cache Memories

@inproceedings{Hill1984ExperimentalEO,
  title={Experimental Evaluation of On-Chip Microprocessor Cache Memories},
  author={Mark D. Hill and Alan Jay Smith},
  booktitle={ISCA},
  year={1984}
}
Advances in integrated circuit density are permitting the implementation on a single chip of functions and performance enhancements beyond those of a basic processors. One performance enhancement of proven value is a cache memory; placing a cache on the processor chip can reduce both mean memory access time and bus traffic. In this paper we use trace driven simulation to study design tradeoffs for small (on-chip) caches. Miss ratio and traffic ratio (bus traffic) are the metrics for cache… CONTINUE READING
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