Evolvable Hardware

@inproceedings{Sekanina2012EvolvableH,
  title={Evolvable Hardware},
  author={Luk{\'a}s Sekanina},
  booktitle={Handbook of Natural Computing},
  year={2012}
}
  • L. Sekanina
  • Published in Handbook of Natural Computing 2012
  • Computer Science
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Two different topologies—systolic array (SA) and Cartesian genetic programming (CGP)—are scaled from small to large sizes and analyzed, comparing their behavior and efficiency at different sizes, showing that SA is considerably more resource-efficient than CGP.
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Image filter evolution on the Xilinx Zynq Platform
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Fundamental concepts of evolutionary hardware design are surveyed and relevant search algorithms such as Cartesian genetic programming (CGP) are introduced, presented as accelerators for evolutionary circuit design and circuit adaptation.
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The experimental results confirm that the reduced number of configuration frames and mutations at lower level of granularity ensure faster evolution, generation of more candidate solutions in a given time as well as solutions with better quality.
Evolutionary design of approximate multipliers under different error metrics
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  • Computer Science
    17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems
  • 2014
TLDR
The proposed method begins with a fully functional circuit which is then intentionally degraded by Cartesian genetic programming to obtain a circuit with a predefined error to design approximate circuits using evolutionary design techniques.
Evolvable Hardware