Evaluation of tunnel FET-based flip-flop designs for low power, high performance applications

@article{Cotter2013EvaluationOT,
  title={Evaluation of tunnel FET-based flip-flop designs for low power, high performance applications},
  author={Matthew Cotter and Huichu Liu and Suman Datta and Narayanan Vijaykrishnan},
  journal={International Symposium on Quality Electronic Design (ISQED)},
  year={2013},
  pages={430-437}
}
As proliferation of embedded systems and mobile devices increases, power has become one of the most paramount concerns in current microprocessor designs. Technology scaling has provided many benefits in terms of dynamic power; however, static power has become the bottleneck to reducing power. We address this by evaluating Tunnel FETs (TFETs) for use in low-power, high-performance flip-flop designs. Due to the nature of TFETs, some of the flip-flop designs that are evaluated require additional… CONTINUE READING
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