Evaluation of Monolithic 3-D Logic Circuits and 6T SRAMs With InGaAs-n/Ge-p Ultra-Thin-Body MOSFETs

@article{Yu2016EvaluationOM,
  title={Evaluation of Monolithic 3-D Logic Circuits and 6T SRAMs With InGaAs-n/Ge-p Ultra-Thin-Body MOSFETs},
  author={Kuan-Chin Yu and Ming-Long Fan and Pin Su and Ching-Te Chuang},
  journal={IEEE Journal of the Electron Devices Society},
  year={2016},
  volume={4},
  pages={76-82}
}
This paper evaluates monolithic 3-D logic circuits and 6T SRAMs composed of InGaAs-n/Ge-p ultra-thin-body MOSFETs while considering interlayer coupling through TCAD mixedmode model. This paper indicates that monolithic 3-D InGaAs/Ge logic circuits provide equal leakage and better delay performance compared with planar 2-D structure through optimized 3-D… CONTINUE READING