Evaluating the Problem of Process Mapping on Network-on-Chip for Parallel Applications

@article{Avelar2011EvaluatingTP,
  title={Evaluating the Problem of Process Mapping on Network-on-Chip for Parallel Applications},
  author={Cintia Pinto Avelar and Poliana A. C. Oliveira and Henrique C. Freitas and Philippe O. A. Navaux},
  journal={2011 Second Workshop on Architecture and Multi-Core Applications (wamca 2011)},
  year={2011},
  pages={18-23}
}
Process mapping on Networks-on-Chip (NoC) is an important issue for the future many-core processors. Mapping strategies can increase performance and scalability by optimizing the communication cost. However, parallel applications have a large set of collective communication performing a high traffic on the Network-on-Chip. Therefore, our goal in this paper is to evaluate the problem related to the process mapping for parallel applications. The results show that for different mappings the… CONTINUE READING