Evaluating energy consumption of homogeneous MPSoCs using spare tiles

Abstract

The yield of homogeneous network-on-chip based multi-processor chips can be improved with the addition of spare tiles. However, the impact of this reliability approach on the chip energy consumption is not documented. For instance, in a homogeneous MPSoC, application tasks can be placed onto any tile of a defect-free chip. On the other hand, a chip with… (More)
DOI: 10.1109/DATE.2011.5763304

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