Evaluating DTM in a Superscalar Processor Architecture

Abstract

Dynamic Trace Memoization (DTM) is a reuse technique that employs memoization tables to skip the execution of sequences of redundant instructions. DTM thus extends the concept of instruction reuse to larger grained units and, contrary to other proposed reuse schemes, it is not constrained by architectural parameters nor code-level boundaries. For the benchmark programs in the SPECInt95 suite, evaluation results show that DTM improves performance by 5% to 21% with an average of 9.3%. For the largest common subset of the SPECInt95 benchmarks tested in two other previously proposed reuse mechanisms, DTM attains twice the average performance increase for conngurations with similar storage capacities.

Cite this paper

@inproceedings{Costay2007EvaluatingDI, title={Evaluating DTM in a Superscalar Processor Architecture}, author={Amarildo T. da Costay and Felipe M. G. Fran ca and Eliseu M. Chaves Filho}, year={2007} }