European Processor Initiative

@article{Kova2022EuropeanPI,
  title={European Processor Initiative},
  author={Mario Kova{\vc} and Jean-Marc Denis and Philippe Notton and Etienne Walter and Denis Dutoit and Frank Badstuebner and S. Stilkerich and Christiane Feldmann and Beno{\^i}t Dupont de Dinechin and Renaud Stevens and Fabrizio Magugliani and Ricardo Chaves and Josip Knezovi{\'c} and Daniel Hofman and Mario Br{\vc}i{\vc} and Katarina Vuku{\vs}i{\'c} and Agneza Krajna and Leon Dragi{\'c} and Igor Pilji{\'c} and Mateja Kova{\vc} and Branimir Malnar and Alen Duspara},
  journal={HPC, Big Data, and AI Convergence Towards Exascale},
  year={2022}
}
4 Citations
Monte Cimone: Paving the Road for the First Generation of RISC-V High-Performance Computers
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Monte Cimone is described, a fully-operational multi-blade computer prototype and hardware-software test-bed based on U740, a double-precision capable multi-core, 64-bit RISC-V SoC, which demonstrates a remarkable level of software and hardware readiness and maturity.
Adaptable Register File Organization for Vector Processors
TLDR
An Adaptable Vector Architecture (AVA) is proposed that is designed for short vectors (MVL=16 elements) and is thus area and energy-efficient and has the functionality to reconfigure the MVL, thereby allowing to exploit the benefits of having a longer vector of up to 128 elements microarchitecture when abundant DLP is present.
Performance Evaluation of Attribute-Based Encryption in Automotive Embedded Platform for Secure Software Over-The-Air Update
TLDR
It is demonstrated that ABE is seamlessly integrable into the state of the art solutions regarding the OTA update by showing that the overhead of the ABE integration in terms of computation time and its storage is negligible w.r.t. the other overheads that are introduced by the Ota process, proving that security can be enhanced with a minimum cost.
Trends in computing technologies and markets: The HEPiX TechWatch WG
TLDR
This talk will give an overview of general and semiconductor markets, server markets, CPUs and accelerators, memories, storage and networks; it will highlight important areas of uncertainties and risks.