Corpus ID: 17499858

Error Detection and Correction: An Introduction

@inproceedings{Gupta2012ErrorDA,
  title={Error Detection and Correction: An Introduction},
  author={Vikas Gupta and C. Verma},
  year={2012}
}
In most communication system whether wired or wireless convolutional encoders are used and AWGN introduces errors during transmission. Various error correcting and controlling mechanisms are present. In this paper all mechanisms are studied and best mechanism on the basis of accuracy, complexity and power consumption is selected. There should be trade off between complexity of hardware and power consumption in decoder. 

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References

SHOWING 1-10 OF 14 REFERENCES
AN EFFICIENT VITERBI DECODER
TLDR
A new efficient fangled Viterbi algorithm is proposed in this paper with less complexity and processing time along with 2 bit error correction capabilities.
Fundamental limits on complexity and power consumption in coded communication
—We provide fundamental information-theoretic bounds on the required communication complexity and computation power consumption for encoding and decoding of error-correcting codes in VLSI
A low-power Viterbi decoder design for wireless communications applications
  • S. Ranpara, D. Ha
  • Computer Science
    Twelfth Annual IEEE International ASIC/SOC Conference (Cat. No.99TH8454)
  • 1999
TLDR
The proposed design reduces the power dissipation of an original Viterbi decoder design by 55% and the schemes employed in the low-power design are clock-gating and toggle filtering.
A Mathematical Theory of Communication
This paper opened the new area the information theory. Before this paper, most people believed that the only way to make the error probability of transmission as small as desired is to reduce the
Green codes: Energy-efficient short-range communication
  • P. Grover, A. Sahai
  • Computer Science, Mathematics
    2008 IEEE International Symposium on Information Theory
  • 2008
TLDR
It is shown that contrary to the classical intuition, the rate for green codes is bounded away from zero for any given error probability, and as the desired bit-error probability goes to zero, the optimizing rate for the authors' bounds converges to 1.
Towards a Communication-Theoretic Understanding of System-Level Power Consumption
TLDR
This paper models the required decoding power and investigates the minimization of total system power from two complementary perspectives, using new lower bounds on the complexity of message-passing decoding to show there is a fundamental tradeoff between transmit and decoding power.
Modern Coding Theory
TLDR
This summary of the state-of-the-art in iterative coding makes this decision more straightforward, with emphasis on the underlying theory, techniques to analyse and design practical iterative codes systems.
Digital communications. 3rd ed
Digital communications is the foundation of modern telecommunications and digital signal processing. The second edition of Digital Communications is updated to include current techniques and systems
An Efficient 10GBASE-T Ethernet LDPC Decoder Design With Low Error Floors
TLDR
A grouped-parallel low-density parity-check (LDPC) decoder is designed for the (2048,1723) Reed-Solomon-based LDPC (RS- LDPC) suitable for 10GBASE-T Ethernet, and the proposed post-processor is conveniently integrated with the decoder, adding minimal area and power.
Fundamental bounds on the interconnect complexity of decoder implementations
  • P. Grover, A. Sahai
  • Mathematics, Computer Science
    2011 45th Annual Conference on Information Sciences and Systems
  • 2011
TLDR
This paper derives lower bounds on the wire-length for decoding any code (even if it is nonlinear) and any message-passing decoding algorithm given the performance and the number of clock-cycles at the decoder.
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