Design of High Speed Vedic Multiplier with Pipeline Technology
- Y. NARASIMHA
In the present techno-world parallel computers are playing vital role in information exchange through various media such as internet and other electronic media. It is very important to consider the data speed along with success rate. The information should reach the destination in time than it become too late. In the present paper, pipeline technologies are discussed to improve data rates. In the present paper two linear pipelines are connected in parallel to improve the fetching speed of the processor. The two pipelines are synchronized and controlled alternatively with common clock pulse.