Enforcing isolation and ordering in STM

@inproceedings{Shpeisman2007EnforcingIA,
  title={Enforcing isolation and ordering in STM},
  author={Tatiana Shpeisman and Vijay Menon and Ali-Reza Adl-Tabatabai and Steven Balensiefer and Dan Grossman and Richard L. Hudson and Katherine F. Moore and Bratin Saha},
  booktitle={PLDI},
  year={2007}
}
Transactional memory provides a new concurrency control mechanism that avoids many of the pitfalls of lock-based synchronization. High-performance software transactional memory (STM) implementations thus far provide weak atomicity: Accessing shared data both inside and outside a transaction can result in unexpected, implementation-dependent behavior. To guarantee isolation and consistent ordering in such a system, programmers are expected to enclose all shared-memory accesses inside… CONTINUE READING
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