Energy reduction in multiprocessor systems using transactional memory
@article{Moreshet2005EnergyRI, title={Energy reduction in multiprocessor systems using transactional memory}, author={Tali Moreshet and R. I. Bahar and M. Herlihy}, journal={ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005.}, year={2005}, pages={331-334} }
The emphasis in microprocessor design has shifted from high performance, to a combination of high performance and low power. Until recently, this trend was mostly true for uniprocessors. In this work the authors focused on new energy consumption issues unique to multiprocessor systems: synchronization of accesses to shared memory. The authors investigated and compared different means of providing atomic access to shared memory, including locks and lock-free synchronization (i.e., transactional… CONTINUE READING
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References
Cacti 3. 0: an integrated cache timing, power, and area model
- Engineering
- 2001
- 788
- Highly Influential
- PDF