Energy efficient synchronization techniques for embedded architectures

@inproceedings{Ferri2008EnergyES,
  title={Energy efficient synchronization techniques for embedded architectures},
  author={C. Ferri and Amber Viescas and Tali Moreshet and R. I. Bahar and M. Herlihy},
  booktitle={GLSVLSI '08},
  year={2008}
}
  • C. Ferri, Amber Viescas, +2 authors M. Herlihy
  • Published in GLSVLSI '08 2008
  • Computer Science
  • We evaluate the energy-efficiency and performance of a number of synchronization mechanisms adapted for embedded devices. We focus on simple hardware accelerators for common software synchronization patterns. We compare the energy efficiency of a range of shared memory benchmarks using both spin-locks and a simple hardware transactional memory. In most cases, transactional memory provides both significantly reduced energy consumption and increased throughput. We also consider applications that… CONTINUE READING
    19 Citations
    Energy and Throughput Efficient Transactional Memory for Embedded Multicore Systems
    • 13
    • PDF
    On the energy-efficiency of software transactional memory
    • 11
    • PDF
    Energy-Performance Tradeoffs in Software Transactional Memory
    • 8
    • PDF
    STM versus lock-based systems: An energy consumption perspective
    • 5
    • PDF
    Characterizing the Energy Consumption of Software Transactional Memory
    • 10
    • PDF
    Energy-Efficient Hardware-Accelerated Synchronization for Shared-L1-Memory Multiprocessor Clusters
    • PDF
    Clock gate on abort: Towards energy-efficient hardware Transactional Memory
    • 19
    • PDF
    Software transactional memory for multicore embedded systems
    • 10
    • PDF