Energy- and time-efficient matrix multiplication on FPGAs

@article{Jang2005EnergyAT,
  title={Energy- and time-efficient matrix multiplication on FPGAs},
  author={Ju-wook Jang and Seonil B. Choi and Viktor K. Prasanna},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  year={2005},
  volume={13},
  pages={1305-1319}
}
We develop new algorithms and architectures for matrix multiplication on configurable devices. These have reduced energy dissipation and latency compared with the state-of-the-art field-programmable gate array (FPGA)-based designs. By profiling well-known designs, we identify "energy hot spots", which are responsible for most of the energy dissipation. Based on this, we develop algorithms and architectures that offer tradeoffs among the number of I/O ports, the number of registers, and the… CONTINUE READING
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