Enabling vertical wormhole switching in 3D NoC-Bus hybrid systems


In Networks-on-Chip (NoC) systems Wormhole Switching (WS) enables lower packet transmission latency and requires less silicon real estate than the Packet Switching (PS). However, enabling vertical WS in conventional 3D NoC-Bus hybrid systems requires a large amount of TSVs, which have low yield in state of the art 3D stacking technology. In this paper, we… (More)


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