Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies

Abstract

With further scaling of nanometer CMOS technologies, yield and reliability become an increasing challenge. This paper reviews the most important phenomena affecting yield and reliability. For each effect, the basic physical mechanisms causing the effect and its impact on transistor parameters are described. Possible solutions to cope/handle with these effects on the design level are discussed as well.

DOI: 10.1145/1403375.1403694

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@article{Gielen2008EmergingYA, title={Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies}, author={Georges G. E. Gielen and Peter H. N. De Wit and Elie Maricau and J. Loeckx and Javier Mart{\'i}n-Mart{\'i}nez and Ben Kaczer and Guido Groeseneken and Rosana Rodr{\'i}guez and Montserrat Nafr{\'i}a}, journal={2008 Design, Automation and Test in Europe}, year={2008}, pages={1322-1327} }