Emerging Memory Technologies

@inproceedings{Xie2013EmergingMT,
  title={Emerging Memory Technologies},
  author={Yuan Xie},
  year={2013}
}
Emerging non-volatile memory (NVM) technologies, such as PCRAM and STT-RAM, are getting mature in recent years. These emerging NVM technologies have demonstrated great potentials to be the candidates for future computer memory architecture design. It is important for SoC designers and computer architects to understand the benefits and limitations of such emerging memory technologies, to improve the performance/power/reliability of future memory architectures. This chapter gives a brief… 
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References

SHOWING 1-10 OF 38 REFERENCES
A durable and energy efficient main memory using phase change memory technology
TLDR
The results indicate that it is feasible to use PCM technology in place of DRAM in the main memory for better energy efficiency and the design choices of implementing PCM to achieve the best tradeoff between energy and performance.
DRAMsim: a memory system simulator
TLDR
DRAMsim is introduced, a detailed and highly-configurable C-based memory system simulator that implements detailed timing models for a variety of existing memories, including SDRAM, DDR, DDR2, DRDRAM and FB-DIMM, with the capability to easily vary their parameters.
A 45nm 1Gb 1.8V phase-change memory
Floating-gate Flash memories have been able so far to satisfy the market requirements, especially for the portable equipments, and to be the mainstream non-volatile memory (NVM) technology [1].
PCRAMsim: System-level performance, energy, and area modeling for Phase-Change RAM
  • Xiangyu Dong, N. Jouppi, Yuan Xie
  • Computer Science, Engineering
    2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers
  • 2009
TLDR
A PCRAM model is presented, called PCRAMsim, to bridge the gap between the device-level and system-level research on PCRAM technology and is expected to help boost PCRAM-related studies such as next-generation memory subsystems.
Energy- and endurance-aware design of phase change memory caches
TLDR
This paper modeled the timing, energy, endurance, and area of PCM caches and integrated them into a PCM cache simulator to evaluate the techniques and shows that the design can achieve 8% of energy saving and 3.8 years of lifetime compared with a baseline PCM Cache.
Architecting phase change memory as a scalable dram alternative
TLDR
This work proposes, crafted from a fundamental understanding of PCM technology parameters, area-neutral architectural enhancements that address these limitations and make PCM competitive with DRAM.
Scalable high performance main memory system using phase-change memory technology
TLDR
This paper analyzes a PCM-based hybrid main memory system using an architecture level model of PCM and proposes simple organizational and management solutions of the hybrid memory that reduces the write traffic to PCM, boosting its lifetime from 3 years to 9.7 years.
Hybrid cache architecture with disparate memory technologies
TLDR
This paper discusses and evaluates two types of hybrid cache architectures: inter cache Level HCA (LHCA), in which the levels in a cache hierarchy can be made of disparate memory technologies; and intra cache level or cache Region based H CA (RHCA), where a single level of cache can be partitioned into multiple regions, each of a different memory technology.
Dynamically replicated memory: building reliable systems from nanoscale resistive memories
DRAM is facing severe scalability challenges in sub-45nm tech- nology nodes due to precise charge placement and sensing hur- dles in deep-submicron geometries. Resistive memories, such as
Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement
TLDR
The experimental results show that MRAM stacking offers competitive IPC performance with a large reduction in power consumption compared to SRAM and DRAM counterparts.
...
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2
3
4
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