Embedded test control schemes for compression in SOCs

@inproceedings{Kay2002EmbeddedTC,
  title={Embedded test control schemes for compression in SOCs},
  author={Douglas Kay and Sung Chung and Samiha Mourad},
  booktitle={DAC},
  year={2002}
}
This paper presents novel control schemes for testing embedded cores in a system on a chip (SOC). It converts a traditional BIST scheme into an externally controllable scheme to achieve a high test quality within optimal test execution time without inserting test points. The scheme promotes design and test reuse without revealing IP information. 

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