Embedded floating-point units in FPGAs

  title={Embedded floating-point units in FPGAs},
  author={Michael J. Beauchamp and S. Hauck and K. Underwood and K. Hemmert},
  booktitle={FPGA '06},
Due to their generic and highly programmable nature, FPGAs provide the ability to implement a wide range of applications. However, it is this nonspecific nature that has limited the use of FPGAs in scientific applications that require floating-point arithmetic. Even simple floating-point operations consume a large amount of computational resources. In this paper, we introduce embedding floating-point multiply-add units in an island style FPGA. This has shown to have an average area savings of… Expand
Architectural Modifications to Improve Floating-Point Unit Efficiency in FPGAs
Floating point datapath synthesis for FPGAs
  • M. Langhammer
  • Computer Science
  • 2008 International Conference on Field Programmable Logic and Applications
  • 2008
Configurable Multimode Embedded Floating-Point Units for FPGAs
Floating Point Hardware for Embedded Processors in FPGAs: Design Space Exploration for Performance and Area
When FPGAs are better at floating-point than microprocessors
Hybrid Floating-point Units in FPGAs
High performance matrix multiply using fused datapath operators
  • M. Langhammer
  • Computer Science
  • 2008 42nd Asilomar Conference on Signals, Systems and Computers
  • 2008