Electronic architecture for an analog retinal processing prototype suitable to be implemented on standard CMOS technology


An analog architecture of optic signal processing is presented in this work, with the goal to emulate one of the much processes involved in a biological retina. Here we have considered that the receptive field is the main unit of processing in the visual system. So, the proposed architecture tries to give partial solution to the properties of a receptive field in order to give some help to people with retinal diseases in the future. A receptive field is represented by an array of 3×3 pixels and four main mathematical operations are carried out on each one pixel. This means that image processing is developed at pixel level. Operations involved are: (1) photo-transduction by photocurrent integration; (2) Average of the signals coming from the eight neighbouring pixels, obtained by a neu-NMOS (v-NMOS) neuron; (3) The gradient between central pixel and the average value from neighboring pixels. This operation is done by a comparator; (4) a generator of impulses whose density is proportional to the gradient. The coupling methodology among every block or module, and the PSPICE simulation using the technology parameters of 0.5µm are the main objectives in this work.

17 Figures and Tables

Showing 1-5 of 5 references

Sensor Inteligente de Imágenes en Tecnología CMOS, con Aplicaciones en Robótica

  • Victor Hugo, Ponce Ponce
  • 2005

Very low-Voltage Analog Signal Processing Based on Quasi-Floating Gate Transistor

  • Jaime Ramírez-Angulo, Antonio J López-Martin, Ieee Member, Ramón González Carvajal, Fernando Muñoz Chavero
  • 2004
1 Excerpt

A Functional MOS Transistor Featuring Gate-Level Weighted Sum and Threshold Operation

  • Tadashi Shibata, Tadahiro Ohmi
  • 1992
1 Excerpt