Efficient throughput-guarantees for latency-sensitive networks-on-chip

@article{Diemer2010EfficientTF,
  title={Efficient throughput-guarantees for latency-sensitive networks-on-chip},
  author={Jonas Diemer and Rolf Ernst and Michael Kauschke},
  journal={2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)},
  year={2010},
  pages={529-534}
}
Networks-on-chip (NoC) for future multi- and many-core processor platforms face an increasing diversity of traffic requirements, ranging from streaming traffic with real-time requirements to bursty best-effort. The best-effort traffic usually results from applications running on general-purpose processors with caches and is very sensitive to latency. Hence… CONTINUE READING