Efficient sub-pixel interpolation and low power VLSI architecture for fractional motion estimation in H.264/AVC

Abstract

In this paper we propose an efficient, low power algorithm and its co-designed VLSI architecture for fractional-pel motion estimation (FME) in H.264/AVC. Our fractional-pel motion estimator uses a simplified FIR filter for half-pel interpolation. Usage of this filter reduces the required number of computations and the memory size and bandwidth for half-pel… (More)

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