Ternary Content-Addressable Memory (TCAM) is a popular hardware device for fast IP address lookup. High link transmission speed of Internet backbone demands more powerful IP address lookup engine. Restricted by the memory access speed, the lookup engine for next-generation routers demands exploiting parallelism among multiple TCAM chips. In this paper, we propose a fast lookup and power-saving scheme which can almost make full use of TCAM chips' capability. With N parallel TCAM chips, the scheme can achieve a worst-case speedup factor of (N−1)∗90% in cache-update state, and a worst-case speedup factor of N∗90% in normal work state.