Efficient scrub mechanisms for error-prone emerging memories

@article{Awasthi2012EfficientSM,
  title={Efficient scrub mechanisms for error-prone emerging memories},
  author={Manu Awasthi and Manjunath Shevgoor and Kshitij Sudan and Bipin Rajendran and Rajeev Balasubramonian and Vijayalakshmi Srinivasan},
  journal={IEEE International Symposium on High-Performance Comp Architecture},
  year={2012},
  pages={1-12}
}
Many memory cell technologies are being considered as possible replacements for DRAM and Flash technologies, both of which are nearing their scaling limits. While these new cells (PCM, STT-RAM, FeRAM, etc.) promise high density, better scaling, and non-volatility, they introduce new challenges. Solutions at the architecture level can help address some of these problems; e.g., prior research has proposed wear-leveling and hard error tolerance mechanisms to overcome the limited write endurance of… CONTINUE READING
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