Efficient implementation of a single-precision floating-point arithmetic unit on FPGA

  title={Efficient implementation of a single-precision floating-point arithmetic unit on FPGA},
  author={Wilson Jose and Ana Rita Silva and Hor{\'a}cio C. Neto and M{\'a}rio P. V{\'e}stias},
  journal={2014 24th International Conference on Field Programmable Logic and Applications (FPL)},
This paper presents a single precision floating point arithmetic unit with support for multiplication, addition, fused multiply-add, reciprocal, square-root and inverse square-root with high-performance and low resource usage. The design uses a piecewise 2nd order polynomial approximation to implement reciprocal, square-root and inverse square-root. The unit can be configured with any number of operations and is capable to calculate any function with a throughput of one operation per cycle. The… CONTINUE READING


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