Efficient implementation of a single-precision floating-point arithmetic unit on FPGA

@article{Jose2014EfficientIO,
  title={Efficient implementation of a single-precision floating-point arithmetic unit on FPGA},
  author={Wilson Jose and Ana Rita Silva and Hor{\'a}cio C. Neto and M{\'a}rio P. V{\'e}stias},
  journal={2014 24th International Conference on Field Programmable Logic and Applications (FPL)},
  year={2014},
  pages={1-4}
}
This paper presents a single precision floating point arithmetic unit with support for multiplication, addition, fused multiply-add, reciprocal, square-root and inverse square-root with high-performance and low resource usage. The design uses a piecewise 2nd order polynomial approximation to implement reciprocal, square-root and inverse square-root. The unit can be configured with any number of operations and is capable to calculate any function with a throughput of one operation per cycle. The… CONTINUE READING

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References

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Showing 1-5 of 5 references

Development of an audio player as system-on-a-chip using an open source platform

  • P. Kiatisevi, L. Azuara, R. Dorsch, H.-J. Wunderlich
  • ISCAS
  • 2005
1 Excerpt

A survey of methods of computing minimax and near-minimax polynomial approximations for functions of a single independent variable

  • W. Fraser
  • J. ACM, vol. 12, no. 3, pp. 295- 314, Jul. 1965.
  • 1965
1 Excerpt

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