Efficient hardware implementation of a highly-parallel 3GPP LTE/LTE-advance turbo decoder

@article{Sun2011EfficientHI,
  title={Efficient hardware implementation of a highly-parallel 3GPP LTE/LTE-advance turbo decoder},
  author={Yang Sun and Joseph R. Cavallaro},
  journal={Integration},
  year={2011},
  volume={44},
  pages={305-315}
}
We present an efficient VLSI architecture for 3GPP LTE/LTE-Advance Turbo decoder by utilizing the algebraic-geometric properties of the quadratic permutation polynomial (QPP) interleaver. The highthroughput 3GPP LTE/LTE-Advance Turbo codes require a highly-parallel decoder architecture. Turbo interleaver is known to be the main obstacle to the decoder parallelism due to the collisions it introduces in accesses to memory. The QPP interleaver solves the memory contention issues when several MAP… CONTINUE READING
Highly Influential
This paper has highly influenced 21 other papers. REVIEW HIGHLY INFLUENTIAL CITATIONS
Highly Cited
This paper has 120 citations. REVIEW CITATIONS
77 Citations
42 References
Similar Papers

Citations

Publications citing this paper.
Showing 1-10 of 77 extracted citations

121 Citations

01020'12'14'16'18
Citations per Year
Semantic Scholar estimates that this publication has 121 citations based on the available data.

See our FAQ for additional information.

References

Publications referenced by this paper.
Showing 1-10 of 42 references

Similar Papers

Loading similar papers…